Publications
Offloading Datacenter Jobs to RISC-V Hardware for Improved Performance and Power Efficiency
Balvansh Heerekar, Cesar Philippidis, Ho-Ren (Jack) Chuang, Pierre Olivier, Antonio Barbalace, Binoy RavindranSYSTOR '24ACM
Aggregate VM: Why Reduce or Evict VM's Resources When You Can Borrow Them From Other Nodes?
Ho-Ren (Jack) Chuang, Karim Manaouil, Tong Xing, Antonio Barbalace, Pierre Olivier, Balvansh Heerekar, Binoy RavindranEuroSys '23ACMCodeArtifact
On Optimizing and Leveraging Distributed Shared Memory for High Performance, Resource Aggregation, and Cache-coherent Heterogeneous-ISA Processors
Ho-Ren (Jack) ChuangPh.D. Dissertation, Virginia TechVTechWorks
Xar-Trek: Run-time Execution Migration among FPGAs and Heterogeneous-ISA CPUs
Edson Horta, Ho-Ren (Jack) Chuang, Naarayanan Rao V Sathish, Cesar Philippidis, Antonio Barbalace, Pierre Olivier, Binoy RavindranMiddleware '21ACMCodearXiv
Scaling Shared Memory Multiprocessing Applications in Non-cache-coherent Domains
Ho-Ren (Jack) Chuang, Robert Lyerly, Stefan Lankes, Binoy RavindranSYSTOR '20ACMCode
DeX: Scaling Applications Beyond Machine Boundaries
Sang-Hoon Kim, Ho-Ren (Jack) Chuang, Robert Lyerly, Pierre Olivier, Changwoo Min, Binoy RavindranICDCS '20IEEE
Breaking the Boundaries in Heterogeneous-ISA Datacenters
Antonio Barbalace, Robert Lyerly, Christopher Jelesnianski, Anthony Carno, Ho-Ren (Jack) Chuang, Vincent Legout, Binoy RavindranASPLOS '17ACM
Transparent Fault-Tolerance Using Intra-Machine Full-Software-Stack Replication on Commodity Multicore Hardware
Giuliano Losa, Antonio Barbalace, Yuzhong Wen, Ho-Ren (Jack) Chuang, Binoy RavindranICDCS '17IEEE
A Distributed Operating System Network Stack and Device Driver for Multicores
Saif Ansary, Antonio Barbalace, Ho-Ren (Jack) Chuang, Thomas Lazor, Binoy RavindranICDCS '17IEEE